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Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators.


ABSTRACT: Analog in-memory computing-a promising approach for energy-efficient acceleration of deep learning workloads-computes matrix-vector multiplications but only approximately, due to nonidealities that often are non-deterministic or nonlinear. This can adversely impact the achievable inference accuracy. Here, we develop an hardware-aware retraining approach to systematically examine the accuracy of analog in-memory computing across multiple network topologies, and investigate sensitivity and robustness to a broad set of nonidealities. By introducing a realistic crossbar model, we improve significantly on earlier retraining approaches. We show that many larger-scale deep neural networks-including convnets, recurrent networks, and transformers-can in fact be successfully retrained to show iso-accuracy with the floating point implementation. Our results further suggest that nonidealities that add noise to the inputs or outputs, not the weights, have the largest impact on accuracy, and that recurrent networks are particularly robust to all nonidealities.

SUBMITTER: Rasch MJ 

PROVIDER: S-EPMC10469175 | biostudies-literature | 2023 Aug

REPOSITORIES: biostudies-literature

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Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators.

Rasch Malte J MJ   Mackin Charles C   Le Gallo Manuel M   Chen An A   Fasoli Andrea A   Odermatt Frédéric F   Li Ning N   Nandakumar S R SR   Narayanan Pritish P   Tsai Hsinyu H   Burr Geoffrey W GW   Sebastian Abu A   Narayanan Vijay V  

Nature communications 20230830 1


Analog in-memory computing-a promising approach for energy-efficient acceleration of deep learning workloads-computes matrix-vector multiplications but only approximately, due to nonidealities that often are non-deterministic or nonlinear. This can adversely impact the achievable inference accuracy. Here, we develop an hardware-aware retraining approach to systematically examine the accuracy of analog in-memory computing across multiple network topologies, and investigate sensitivity and robustn  ...[more]

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