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A High-Performance and Cost-Effective Field Programmable Gate Array-Based Motor Drive Emulator.


ABSTRACT: This work presents a hardware-based digital emulator capable of digitally driving a permanent magnet synchronous machine electronic setup. The aim of this work is to present a high-performance, cost-effective, and portable complementary solution when new paradigms of electronic drive design are generated, such as machine early failure detection, fault-tolerant drive, and high-performance control strategy implementations. In order to achieve the high performance required by the digital emulator, the electronic drive models (permanent-magnet synchronous machine, voltage-source inverter, motor-control strategy) are digitally described in Verilog hardware description language and implemented on a field programmable gate array (FPGA) digital platform using two approaches: parallel and sequential methods. The results obtained show the effectiveness of the digital emulator design, and the resources used by the solution presented can be implemented on a low-cost digital platform that reveals a cost-effective operation of the solution presented.

SUBMITTER: Hernandez J 

PROVIDER: S-EPMC10608923 | biostudies-literature | 2023 Sep

REPOSITORIES: biostudies-literature

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A High-Performance and Cost-Effective Field Programmable Gate Array-Based Motor Drive Emulator.

Hernandez Julio J   Rangel-Magdaleno Jose de Jesus JJ   Morales-Caporal Roberto R  

Micromachines 20230928 10


This work presents a hardware-based digital emulator capable of digitally driving a permanent magnet synchronous machine electronic setup. The aim of this work is to present a high-performance, cost-effective, and portable complementary solution when new paradigms of electronic drive design are generated, such as machine early failure detection, fault-tolerant drive, and high-performance control strategy implementations. In order to achieve the high performance required by the digital emulator,  ...[more]

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