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On-chip integrated vertically aligned carbon nanotube based super- and pseudocapacitors.


ABSTRACT: On-chip energy storage and management will have transformative impacts in developing advanced electronic platforms with built-in energy needs for operation of integrated circuits driving a microprocessor. Though success in growing stand-alone energy storage elements such as electrochemical capacitors (super and pseusocapacitors) on a variety of substrates is a promising step towards this direction. In this work, on-chip energy storage is demonstrated using architectures of highly aligned vertical carbon nanotubes (CNTs) acting as supercapacitors, capable of providing large device capacitances. The efficiency of these structures is further increased by incorporating electrochemically active nanoparticles such as MnOx to form pseudocapacitive architectures thus enhancing device capacitance areal specific capacitance of 37 mF/cm2. The demonstrated on-chip integration is up and down-scalable, compatible with standard CMOS processes, and offers lightweight energy storage what is vital for portable and autonomous device operation with numerous advantages as compared to electronics built from discrete components.

SUBMITTER: Pitkanen O 

PROVIDER: S-EPMC5707404 | biostudies-literature | 2017 Nov

REPOSITORIES: biostudies-literature

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On-chip integrated vertically aligned carbon nanotube based super- and pseudocapacitors.

Pitkänen O O   Järvinen T T   Cheng H H   Lorite G S GS   Dombovari A A   Rieppo L L   Talapatra S S   Duong H M HM   Tóth G G   Juhász K L KL   Kónya Z Z   Kukovecz A A   Ajayan P M PM   Vajtai R R   Kordás K K  

Scientific reports 20171129 1


On-chip energy storage and management will have transformative impacts in developing advanced electronic platforms with built-in energy needs for operation of integrated circuits driving a microprocessor. Though success in growing stand-alone energy storage elements such as electrochemical capacitors (super and pseusocapacitors) on a variety of substrates is a promising step towards this direction. In this work, on-chip energy storage is demonstrated using architectures of highly aligned vertica  ...[more]

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