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Logic and memory functions of an inverter comprising reconfigurable double gated feedback field effect transistors.


ABSTRACT: In this study, we propose an inverter consisting of reconfigurable double-gated (DG) feedback field-effect transistors (FBFETs) and examine its logic and memory operations through a mixed-mode technology computer-aided design simulation. The DG FBFETs can be reconfigured to n- or p-channel modes, and these modes exhibit an on/off current ratio of ~ 1012 and a subthreshold swing (SS) of ~ 0.4 mV/dec. Our study suggests the solution to the output voltage loss, a common problem in FBFET-based inverters; the proposed inverter exhibits the same output logic voltage as the supply voltage in gigahertz frequencies by applying a reset operation between the logic operations. The inverter retains the output logic '1' and '0' states for ~ 21 s without the supply voltage. The proposed inverter demonstrates the promising potential for logic-in-memory application.

SUBMITTER: Jeon J 

PROVIDER: S-EPMC9307848 | biostudies-literature | 2022 Jul

REPOSITORIES: biostudies-literature

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Logic and memory functions of an inverter comprising reconfigurable double gated feedback field effect transistors.

Jeon Juhee J   Woo Sola S   Cho Kyoungah K   Kim Sangsig S  

Scientific reports 20220722 1


In this study, we propose an inverter consisting of reconfigurable double-gated (DG) feedback field-effect transistors (FBFETs) and examine its logic and memory operations through a mixed-mode technology computer-aided design simulation. The DG FBFETs can be reconfigured to n- or p-channel modes, and these modes exhibit an on/off current ratio of ~ 10<sup>12</sup> and a subthreshold swing (SS) of ~ 0.4 mV/dec. Our study suggests the solution to the output voltage loss, a common problem in FBFET-  ...[more]

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