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The gate injection-based field-effect synapse transistor with linear conductance update for online training.


ABSTRACT: Neuromorphic computing, an alternative for von Neumann architecture, requires synapse devices where the data can be stored and computed in the same place. The three-terminal synapse device is attractive for neuromorphic computing due to its high stability and controllability. However, high nonlinearity on weight update, low dynamic range, and incompatibility with conventional CMOS systems have been reported as obstacles for large-scale crossbar arrays. Here, we propose the CMOS compatible gate injection-based field-effect transistor employing thermionic emission to enhance the linear conductance update. The dependence of the linearity on the conduction mechanism is examined by inserting an interfacial layer in the gate stack. To demonstrate the conduction mechanism, the gate current measurement is conducted under varying temperatures. The device based on thermionic emission achieves superior synaptic characteristics, leading to high performance on the artificial neural network simulation as 93.17% on the MNIST dataset.

SUBMITTER: Seo S 

PROVIDER: S-EPMC9616899 | biostudies-literature | 2022 Oct

REPOSITORIES: biostudies-literature

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The gate injection-based field-effect synapse transistor with linear conductance update for online training.

Seo Seokho S   Kim Beomjin B   Kim Donghoon D   Park Seungwoo S   Kim Tae Ryong TR   Park Junkyu J   Jeong Hakcheon H   Park See-On SO   Park Taehoon T   Shin Hyeok H   Kim Myung-Su MS   Choi Yang-Kyu YK   Choi Shinhyun S  

Nature communications 20221028 1


Neuromorphic computing, an alternative for von Neumann architecture, requires synapse devices where the data can be stored and computed in the same place. The three-terminal synapse device is attractive for neuromorphic computing due to its high stability and controllability. However, high nonlinearity on weight update, low dynamic range, and incompatibility with conventional CMOS systems have been reported as obstacles for large-scale crossbar arrays. Here, we propose the CMOS compatible gate i  ...[more]

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