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Transferred metal gate to 2D semiconductors for sub-1 V operation and near ideal subthreshold slope


ABSTRACT: Description van der Waals metal gate to two-dimensional semiconductors enables low-power electronic devices. Ultrathin two-dimensional (2D) semiconductors are regarded as a potential channel material for low-power transistors with small subthreshold swing and low leakage current. However, their dangling bond–free surface makes it extremely difficult to deposit gate dielectrics with high-quality interface in metal-oxide-semiconductor (MOS) field-effect transistors (FETs). Here, we demonstrate a low-temperature process to transfer metal gate to 2D MoS2 for high-quality interface. By excluding extrinsic doping to MoS2 and increasing contact distance, the high–barrier height Pt-MoS2 Schottky junction replaces the commonly used MOS capacitor and eliminates the use of gate dielectrics. The MoS2 transferred metal gate (TMG) FETs exhibit sub-1 V operation voltage and a subthreshold slope close to thermal limit (60 mV/dec), owing to intrinsically high junction capacitance and the high-quality interface. The TMG and back gate enable logic functions in a single transistor with small footprint.

SUBMITTER: Wang J 

PROVIDER: S-EPMC8550226 | biostudies-literature |

REPOSITORIES: biostudies-literature

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