Multi-Domain Negative Capacitance Effects in Metal-Ferroelectric-Insulator-Semiconductor/Metal Stacks: A Phase-field Simulation Based Study.

ABSTRACT: We analyze the ferroelectric domain-wall induced negative capacitance (NC) effect in Metal-FE-Insulator-Metal (MFIM) and Metal-FE-Insulator-Semiconductor (MFIS) stacks through phase-field simulations by self-consistently solving time-dependent Ginzburg Landau equation, Poisson's equation and semiconductor charge equations. Considering Hf_0.5Zr_0.5O₂ as the ferroelectric material, we study 180° ferroelectric domain formation in MFIM and MFIS stacks and their polarization switching characteristics. Our analysis signifies that the applied voltage-induced polarization switching via soft domain-wall displacement exhibits non-hysteretic characteristics. In addition, the change in domain-wall energy, due to domain-wall displacement, exhibits a long-range interaction and thus, leads to a non-homogeneous effective local negative permittivity in the ferroelectric. Such effects yield an average negative effective permittivity that further provides an enhanced charge response in the MFIM stack, compared to Metal-Insulator-Metal. Furthermore, we show that the domain-wall induced negative effective permittivity is not an intrinsic property of the ferroelectric material and therefore, is dependent on its thickness, the gradient energy coefficient and the in-plane permittivity of the underlying insulator. Similar to the MFIM stack, MFIS stack also exhibits an enhanced charge/capacitance response compared to Metal-Oxide-Semiconductor (MOS) capacitor. Simultaneously, the multi-domain state of the ferroelectric induces non-homogeneous potential in the underlying insulator and semiconductor layer. At low applied voltages, such non-homogeneity leads to the co-existence of electrons and holes in an undoped semiconductor. In addition, we show that with the ferroelectric layer being in the 180° multi-domain state, the minimum potential at the ferroelectric-dielectric interface and hence, the minimum surface potential in the semiconductor, does not exceed the applied voltage (in-spite of the local differential amplification and charge enhancement).

SUBMITTER: Saha AK 

PROVIDER: S-EPMC7311392 | biostudies-literature | 2020 Jun

REPOSITORIES: biostudies-literature